Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form where
they would switch 20 ma into either the true or the complement out-
put and thus have no AC energy at the power supply level ??
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form where
they would switch 20 ma into either the true or the complement out-
put and thus have no AC energy at the power supply level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine would
take a data-dependent hard crash.
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
MitchAlsup1 <mitchalsup@aol.com> schrieb:
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form where
they would switch 20 ma into either the true or the complement out-
put and thus have no AC energy at the power supply level ??
That they didn't mention. They stressed his decision to build
a machine which had good all-round performance, unlike the
predecessors like the STAR or the Texas Instruments ASC (which I
had never heard or read of).
There was one part on the Cray-I design that I found weird. After
writing that individual transistors would have been faster than
integrated circuits, but were chosen for density and manufacture,
they wrote
"Concerning memory, as in the case of the CPU, Cray did not
choose the fastest individual components, which would have
been magnetic cores" due to their limitations in size.
What they also describe well is the tradeoff between different
vector lengths. Also very interesting is the mechanisms of getting
the machines adopted by different industries.
On Sun, 18 May 2025 05:46:37 -0000 (UTC)
Thomas Koenig <tkoenig@netcologne.de> wrote:
MitchAlsup1 <mitchalsup@aol.com> schrieb:
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form where
they would switch 20 ma into either the true or the complement out-
put and thus have no AC energy at the power supply level ??
That they didn't mention. They stressed his decision to build
a machine which had good all-round performance, unlike the
predecessors like the STAR or the Texas Instruments ASC (which I
had never heard or read of).
May be, that aspect of CRAY-1 was different from STAR and ASC, but not different from CDC 6600 or 7600 or from top models of Cyber-170 series.
There was one part on the Cray-I design that I found weird. After
writing that individual transistors would have been faster than
integrated circuits, but were chosen for density and manufacture,
they wrote
That part sounds correct. Logic ICs used in Cray-1 were indeed slower
than contemporary individual transistors.
"Concerning memory, as in the case of the CPU, Cray did not
choose the fastest individual components, which would have
been magnetic cores" due to their limitations in size.
That part does not sound right. CRAY-1 main memory was made of SRAM
with 48 ns access time. That was 4-5 times faster than contemporary
core memories. Plus, it didn't suffer from destructive read.
One part that is true is that faster and less dense memory components
were available, but they were SRAM as well.
What they also describe well is the tradeoff between different
vector lengths. Also very interesting is the mechanisms of getting
the machines adopted by different industries.
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form where
they would switch 20 ma into either the true or the complement out-
put and thus have no AC energy at the power supply level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine would
take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
Yes, but the CDC 6600 and 7600, while powerful computers, were ordinary computers. They were not vector machines.
Eventually, IBM caught up with the Control Data 6600 by perfecting pipelining in the IBM 360/91 ...
On Mon, 19 May 2025 01:08:11 +0000, quadibloc wrote:
Yes, but the CDC 6600 and 7600, while powerful computers, were
ordinary computers. They were not vector machines.
They were pipelined machines.
They were orders of magnitude faster
than anything from IBM.
They pioneered the very concept of a
“supercomputer”.
There was nothing “ordinary” about that.
On Sun, 18 May 2025 8:33:30 +0000, Michael S wrote:
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form
where they would switch 20 ma into either the true or the
complement out- put and thus have no AC energy at the power supply
level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine would
take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
Vdd and Gnd which fed the integrated logic gates.
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
My question was about absolute numbers. Volts, amperes, nanoseconds.
On Sun, 18 May 2025 22:01:19 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
On Sun, 18 May 2025 8:33:30 +0000, Michael S wrote:
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load to
the power supply:: that is, the ECL gates were all of the form
where they would switch 20 ma into either the true or the
complement out- put and thus have no AC energy at the power supply
level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine would
take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
Vdd and Gnd which fed the integrated logic gates.
My question was about absolute numbers. Volts, amperes, nanoseconds.
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
On Mon, 19 May 2025 13:35:37 +0000, Michael S wrote:
On Sun, 18 May 2025 22:01:19 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
On Sun, 18 May 2025 8:33:30 +0000, Michael S wrote:
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load
to the power supply:: that is, the ECL gates were all of the form
where they would switch 20 ma into either the true or the
complement out- put and thus have no AC energy at the power
supply level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine
would take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
Vdd and Gnd which fed the integrated logic gates.
My question was about absolute numbers. Volts, amperes,
nanoseconds.
CDC 6600 was built with (effectively) RTL logic using individual parts {transistors, resistors, capacitors, ...} well documented in "design
of a computer" Thornton.
CDC 7600 was built with some kind of integrated circuits, but not
TTL or ECL. I don't remember which (its been too long).
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
On Mon, 19 May 2025 01:56:50 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
They were orders of magnitude faster than anything from IBM.
That sounds like exaggeration.
They pioneered the very concept of a “supercomputer”.https://en.wikipedia.org/wiki/IBM_7030_Stretch
CDC 6600 was built with (effectively) RTL logic using individual parts {transistors, resistors, capacitors, ...} well documented in "design of
a computer" Thornton.
CDC 7600 was built with some kind of integrated circuits, but not TTL or
ECL. I don't remember which (its been too long).
On Mon, 19 May 2025 16:55:49 +0300, Michael S wrote:
On Mon, 19 May 2025 01:56:50 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
They were orders of magnitude faster than anything from IBM.
That sounds like exaggeration.
Thomas Watson Jr, boss of IBM, sent out the following memo after the
1963 Business Week feature on CDC and the forthcoming 6600:
Last week Control Data had a press conference during which they
officially announced their 6600 system. I understand that in the
laboratory developing this system there are only 34 people,
including the janitor. Of these, 14 are engineers and 4 are
programmers, and only one person has a Ph.D., a relatively junior
programmer. Contrasting this modest effort with our own vast
development activities, I fail to understand why we have lost our
industry leadership position by letting someone else offer the
world’s most powerful computer.
They pioneered the very concept of a “supercomputer”.https://en.wikipedia.org/wiki/IBM_7030_Stretch
Let’s just say, the 7030 was just the start of a long IBM tradition
of over-promising and under-delivering.
On Mon, 19 May 2025 18:14:17 +0000, MitchAlsup1 wrote:
CDC 6600 was built with (effectively) RTL logic using individual parts
{transistors, resistors, capacitors, ...} well documented in "design of
a computer" Thornton.
CDC 7600 was built with some kind of integrated circuits, but not TTL or
ECL. I don't remember which (its been too long).
What happened with the 8600? That was the project Seymour Cray
abandoned,
when he left CDC to form Cray Research.
On Mon, 19 May 2025 23:58:16 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
On Mon, 19 May 2025 16:55:49 +0300, Michael S wrote:
On Mon, 19 May 2025 01:56:50 -0000 (UTC)
Lawrence D'Oliveiro <ldo@nz.invalid> wrote:
They were orders of magnitude faster than anything from IBM.
That sounds like exaggeration.
Thomas Watson Jr, boss of IBM, sent out the following memo after the
1963 Business Week feature on CDC and the forthcoming 6600:
Last week Control Data had a press conference during which they
officially announced their 6600 system. I understand that in the
laboratory developing this system there are only 34 people,
including the janitor. Of these, 14 are engineers and 4 are
programmers, and only one person has a Ph.D., a relatively junior
programmer. Contrasting this modest effort with our own vast
development activities, I fail to understand why we have lost our
industry leadership position by letting someone else offer the
world’s most powerful computer.
At time of introduction CDC 6600 was undoubtedly much faster both than
older [more expensive] IBM 7030 and than contemporary [significantly
less expensive] S/360 Model 50. But it was not "orders of magnitude
faster".
Not even one order of magnitude faster, except, may be, vs
Model 50 in artificial very memory-light floating-point intensive
scenarios.
High end S/360 (Model 65) came about half a year later. I would imagine
that for non-floating-point code it had about the same speed as 6600.
Or not, I don't really know.
They pioneered the very concept of a “supercomputer”.https://en.wikipedia.org/wiki/IBM_7030_Stretch
Let’s just say, the 7030 was just the start of a long IBM tradition
of over-promising and under-delivering.
It is true that IBM was over-promising und under-delivering with 7030.
It does not change the fact that it was called "supercomputer" and that despite under-delivery until introduction of 6600 it was the fastest
computer in the world.
At time of introduction CDC 6600 was undoubtedly much faster both than
older [more expensive] IBM 7030 and than contemporary [significantly
less expensive] S/360 Model 50. But it was not "orders of magnitude
faster". Not even one order of magnitude faster, except, may be, vs
Model 50 in artificial very memory-light floating-point intensive
scenarios.
High end S/360 (Model 65) came about half a year later. I would imagine
that for non-floating-point code it had about the same speed as 6600.
According to Michael S <already5chosen@yahoo.com>:
At time of introduction CDC 6600 was undoubtedly much faster both than >>older [more expensive] IBM 7030 and than contemporary [significantly
less expensive] S/360 Model 50. But it was not "orders of magnitude >>faster". Not even one order of magnitude faster, except, may be, vs
Model 50 in artificial very memory-light floating-point intensive >>scenarios.
High end S/360 (Model 65) came about half a year later. I would imagine >>that for non-floating-point code it had about the same speed as 6600.
Those 360 models seem wrong. The 360/50 was a midrange machine that
shipped in August 1965, the /65 was a large machine that shipped
in November 1964, and the 360/75 was a high end machine that
shipped in January 1966. They were all announced at the same
time, give or take IBM's replacing the paper 60 and 70 with the
faster 65 and 75.
STRETCH was about 1.2 MIPS, the /50 was 0.133 scientific, 0.169
commercial,
the /65 was .563 and .567, and the /75 was .940 and .670, so only
the /75 was a plausible replacement. The high end machine was the /91
which shipped late and over budget in Oct 1967 and was much faster,
1.9 MIPS scientific and 1.8 MIPS commercial. (I think the 91's
actual commercial performance was much lower since it simulated
decimal arithmetic in software, but nobody ran RPG programs on
a /91.)
For concrete numbers a double precision floating point memory
to register add on the /50 took 9.7us, /65 took 2.5us, /75 took .92us
Floating multiply was 47us, 7.7us, 4.1us.
The numbers for the /91 depended on whether the operands were
available but if they were adds were 120ns, multiply 180ns.
The 6600 was reported to be three times faster than STRETCH which
would have been 3.6 MIPS, a lot faster than any 360 of the time
and well over an order of magnitude faster than the not particularly
fast 360/50.
Cray was "a bone" to work with.
W.r.t. CDC 6600 Wikipedia article does not state an exact date of the
1st shipment at all, just saying that it was in 1965.
According to Michael S <already5chosen@yahoo.com>:
At time of introduction CDC 6600 was undoubtedly much faster both
than older [more expensive] IBM 7030 and than contemporary
[significantly less expensive] S/360 Model 50. But it was not
"orders of magnitude faster". Not even one order of magnitude
faster, except, may be, vs Model 50 in artificial very memory-light >floating-point intensive scenarios.
High end S/360 (Model 65) came about half a year later. I would
imagine that for non-floating-point code it had about the same speed
as 6600.
Those 360 models seem wrong. The 360/50 was a midrange machine that
shipped in August 1965, the /65 was a large machine that shipped
in November 1964,
and the 360/75 was a high end machine that
shipped in January 1966. They were all announced at the same
time, give or take IBM's replacing the paper 60 and 70 with the
faster 65 and 75.
STRETCH was about 1.2 MIPS, the /50 was 0.133 scientific, 0.169
commercial, the /65 was .563 and .567, and the /75 was .940 and .670,
so only the /75 was a plausible replacement. The high end machine
was the /91 which shipped late and over budget in Oct 1967 and was
much faster, 1.9 MIPS scientific and 1.8 MIPS commercial. (I think
the 91's actual commercial performance was much lower since it
simulated decimal arithmetic in software, but nobody ran RPG programs
on a /91.)
For concrete numbers a double precision floating point memory
to register add on the /50 took 9.7us, /65 took 2.5us, /75 took .92us
Floating multiply was 47us, 7.7us, 4.1us.
The numbers for the /91 depended on whether the operands were
available but if they were adds were 120ns, multiply 180ns.
The 6600 was reported to be three times faster than STRETCH which
would have been 3.6 MIPS, a lot faster than any 360 of the time
and well over an order of magnitude faster than the not particularly
fast 360/50.
According to Michael S <already5chosen@yahoo.com>:
At time of introduction CDC 6600 was undoubtedly much faster both
than older [more expensive] IBM 7030 and than contemporary
[significantly less expensive] S/360 Model 50. But it was not
"orders of magnitude faster". Not even one order of magnitude
faster, except, may be, vs Model 50 in artificial very memory-light
floating-point intensive scenarios.
High end S/360 (Model 65) came about half a year later. I would
imagine that for non-floating-point code it had about the same speed
as 6600.
Those 360 models seem wrong. The 360/50 was a midrange machine that
shipped in August 1965, the /65 was a large machine that shipped
in November 1964,
Do you mean, November 1965?
and the 360/75 was a high end machine that
shipped in January 1966. They were all announced at the same
time, give or take IBM's replacing the paper 60 and 70 with the
faster 65 and 75.
Sorry, I did not read Wikipedia articles about /50 and /65 with
sufficient attention and confused announcement with shipment. Didn't
realize that for /50 the time between announcement and shipment was
much longer than for /65.
W.r.t. CDC 6600 Wikipedia article does not state an exact date of the
1st shipment at all, just saying that it was in 1965.
According to Michael S <already5chosen@yahoo.com>:
According to Michael S <already5chosen@yahoo.com>:
At time of introduction CDC 6600 was undoubtedly much faster both
than older [more expensive] IBM 7030 and than contemporary
[significantly less expensive] S/360 Model 50. But it was not
"orders of magnitude faster". Not even one order of magnitude
faster, except, may be, vs Model 50 in artificial very
memory-light floating-point intensive scenarios.
High end S/360 (Model 65) came about half a year later. I would
imagine that for non-floating-point code it had about the same
speed as 6600.
Those 360 models seem wrong. The 360/50 was a midrange machine
that shipped in August 1965, the /65 was a large machine that
shipped in November 1964,
Do you mean, November 1965?
Yes, of course, I can't type.
and the 360/75 was a high end machine that
shipped in January 1966. They were all announced at the same
time, give or take IBM's replacing the paper 60 and 70 with the
faster 65 and 75.
Sorry, I did not read Wikipedia articles about /50 and /65 with
sufficient attention and confused announcement with shipment. Didn't >realize that for /50 the time between announcement and shipment was
much longer than for /65.
With that correction, only three months which doesn't seem like much.
The physical planning for power and cooling and raised floors and
such to be ready for delivery would take longer than that.
W.r.t. CDC 6600 Wikipedia article does not state an exact date of the
1st shipment at all, just saying that it was in 1965.
Says here late 1964. It was a huge embarassment to IBM. I imagine a
large part of that was that it blew up IBM's longstanding belief that
you had to make a computer really complicated to make it fast, viz.
STRETCH and 360/91.
https://mncomputinghistory.com/control-data-corporation/
IBM sort of came around to that with the 360/44, which implemented a scientific subset of the 360's instruction set and ran nearly as fast
as a /65. It was intended for process control so they added priority interrupts and some real time I/O.
Sorry, I did not read Wikipedia articles about /50 and /65 with
sufficient attention and confused announcement with shipment. Didn't
realize that for /50 the time between announcement and shipment was
much longer than for /65.
With that correction, only three months which doesn't seem like much.
The physical planning for power and cooling and raised floors and
such to be ready for delivery would take longer than that.
According to Wikipedia:
Model Announcement Shipment A-to-S
50 1964-04 1965-08 18 months
65 1965-04 1965-11 7 months
Says here late 1964. It was a huge embarassment to IBM. I imagine a large part
of that was that it blew up IBM's longstanding belief that you had to make a computer really complicated to make it fast, viz. STRETCH and 360/91.
https://mncomputinghistory.com/control-data-corporation/
IBM sort of came around to that with the 360/44, which implemented a scientific
subset of the 360's instruction set and ran nearly as fast as a /65. It was intended for process control so they added priority interrupts and some real time I/O.
On 5/19/25 2:14 PM, MitchAlsup1 wrote:
On Mon, 19 May 2025 13:35:37 +0000, Michael S wrote:Could it have been DTL (Diode-Transistor-Logic).
On Sun, 18 May 2025 22:01:19 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
On Sun, 18 May 2025 8:33:30 +0000, Michael S wrote:
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load to >>>>>> the power supply:: that is, the ECL gates were all of the form
where they would switch 20 ma into either the true or the
complement out- put and thus have no AC energy at the power supply >>>>>> level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce
and Vdd drop than the gates cols accommodate and the machine would >>>>>> take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
Vdd and Gnd which fed the integrated logic gates.
My question was about absolute numbers. Volts, amperes, nanoseconds.
CDC 6600 was built with (effectively) RTL logic using individual parts
{transistors, resistors, capacitors, ...} well documented in "design
of a computer" Thornton.
CDC 7600 was built with some kind of integrated circuits, but not
TTL or ECL. I don't remember which (its been too long).
In 1966 I worked
on an aerospace computer implemented with DTL, in flatpacks made
by Westinghouse (could that be?). The computer was interesting
in that it had sine and cosine instructions (implemented by the
cordic algorithm).
Brian
So, Cray got rid of the problem by presenting a DC-load to the
power supply.
On Mon, 26 May 2025 16:48:13 +0000, Brian G. Lucas wrote:
On 5/19/25 2:14 PM, MitchAlsup1 wrote:
On Mon, 19 May 2025 13:35:37 +0000, Michael S wrote:Could it have been DTL (Diode-Transistor-Logic).
On Sun, 18 May 2025 22:01:19 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
On Sun, 18 May 2025 8:33:30 +0000, Michael S wrote:
On Sat, 17 May 2025 21:27:04 +0000
mitchalsup@aol.com (MitchAlsup1) wrote:
Did the book relate the story of why CRAY-1 presented a DC-load to >>>>>>> the power supply:: that is, the ECL gates were all of the form
where they would switch 20 ma into either the true or the
complement out- put and thus have no AC energy at the power supply >>>>>>> level ??
During the CDC 7600 reign, when performing vector calculations,
(even though CDC 7600 was not a vector machine, it could stream
calculations through its execution window at impressive rates);
Certain data bit-patterns in CDC 7600 would cause more Gnd bounce >>>>>>> and Vdd drop than the gates cols accommodate and the machine would >>>>>>> take a data-dependent hard crash.
Which voltage, current and frequency are we talking about?
Vdd and Gnd which fed the integrated logic gates.
My question was about absolute numbers. Volts, amperes, nanoseconds.
CDC 6600 was built with (effectively) RTL logic using individual parts
{transistors, resistors, capacitors, ...} well documented in "design
of a computer" Thornton.
CDC 7600 was built with some kind of integrated circuits, but not
TTL or ECL. I don't remember which (its been too long).
Candidates:: RTL, DTL, CML
In 1966 I worked
on an aerospace computer implemented with DTL, in flatpacks made
by Westinghouse (could that be?). The computer was interesting
in that it had sine and cosine instructions (implemented by the
cordic algorithm).
There are also two CDC manuals on bitsavers showing the circuit designs
for various digital and analog modules dated 1967.
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