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  • My4th

    From minforth@21:1/5 to All on Fri Mar 31 14:03:34 2023
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From dxforth@21:1/5 to minforth on Sat Apr 1 12:24:00 2023
    On 1/04/2023 8:03 am, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm

    Even Herculean. Given the effort necessary some may well ask:

    "What is the additional benefit against the proven original?"

    Needs must when the devil drives.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to Jurgen Pitaske on Sat Apr 1 00:35:35 2023
    On Saturday, 1 April 2023 at 08:33:42 UTC+1, Jurgen Pitaske wrote:
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm
    Having a Forth ( his own version ) running WITHOUT a processor
    - must have been a nice journey .

    And now available as kit soon, so you can solder it together yourself.

    But one question remains: How does it all work?

    It all starts with the microcode address counter, which is something like the "heart" of the computer. Each machine instruction is composed of up to 128 microinstructions, whereby a microinstruction consists of two parts: an 8-bit control word and an
    optional 8-bit data word. The machine instruction (the "OP code") to be executed is applied to address lines A8 to A14 of the EPROM, and the microcode address counter is connected to A0 to A7. The microcode address counter counts through all
    microinstructions of the current OP code.

    In every "even" clock cycle (when A0 is zero), the first part of the microinstruction, namely the control word, is stored in the control word latch. 5 of the 8 signals of this control word are used to control the data flow through the processor by
    selecting the source and destination device. The final data transfer occurs in the following "odd" clock cycle when A0 is one. Since in this second clock cycle the EPROM itself can also serve as a data source, it is easy to store constant values defined
    by the microcode in the various registers and the RAM. However, since any address can be input into the EPROM in this cycle, it is possible to perform random read accesses to the EPROM so that the application program (the Forth interpreter) can be
    executed from the EPROM.

    As you can see, the main purpose of all the logic is to transfer data from the various sources to the various destinations under the control of the microcode. The CPU registers such as PC, SP, Accu, etc. are all stored in RAM. The programme counter is
    incremented via a look-up table in the EPROM.

    Data manipulation is done via a single NOR gate on the D0 data line. You may already know that really any logical function can be derived from the NOR function, even complex functions like addition and subtraction. But to process all the bits of a byte,
    My4TH must loop over all the data bits and process bit by bit. The required data shift function is also implemented as a look-up table in the EPROM.

    Conditional jumps are only possible within the 128 microcode positions of an OP code. When the microcode needs to perform a conditional jump, it first loads the target address (which ranges from 0 to 127) into the lower 8 bits of the 16-bit address
    latch. A control signal coming from the control word latch then enables the conditional loading of the new address into the microinstruction counter depending on the value of D0 within the odd clock cycle.

    If you are more interested in the microcode, I recommend to study the document "The MyNOR ADD instruction" where I describe how I implemented the ADD instruction in the microcode for the MyNOR computer. Since MyNOR and My4TH are very similar, the
    microcode of the ADD function works exactly the same on My4TH. But to increase performance, I cheated a little on the My4TH by implementing the one-bit adder via a small look-up table in the EPROM.

    Now we get down to business: The schematic. Click on the image to download it as a better readable PDF file.

    Want to build your own? Everything you need is here:

    Downloads
    KiCad design files: kicad_my4th-sbc_v1.2.zip
    Gerber data for PCB order: gerber_my4th-sbc_v1.2.zip
    Schematics as PDF file: schematics_my4th-sbc_v1.2.pdf
    My4TH construction manual: My4TH_Construction_Manual.pdf
    Description of the GPIO interface: My4TH-Interfaces.pdf
    My4TH Assembly Instruction Set: My4TH_Instruction-Set.pdf
    My4TH EPROM image files and source code: my4th-rom-v1.0.zip
    Forth word set extension modules: my4th-modules.zip
    Forth glossary and reference: My4TH_Forth_Glossary.pdf
    Data exchange between My4TH and a PC: My4TH_Data_Exchange.pdf
    my4th transfer tool for Windows and Linux: my4th-tool-v1.0.zip
    myca cross assembler for MyCPU, MyNOR and My4TH: myca-1.10.zip

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to minforth on Sat Apr 1 00:33:41 2023
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm

    Having a Forth ( his own version ) running WITHOUT a processor
    - must have been a nice journey .

    And now available as kit soon, so you can solder it together yourself.

    But one question remains: How does it all work?

    It all starts with the microcode address counter, which is something like the "heart" of the computer. Each machine instruction is composed of up to 128 microinstructions, whereby a microinstruction consists of two parts: an 8-bit control word and an
    optional 8-bit data word. The machine instruction (the "OP code") to be executed is applied to address lines A8 to A14 of the EPROM, and the microcode address counter is connected to A0 to A7. The microcode address counter counts through all
    microinstructions of the current OP code.

    In every "even" clock cycle (when A0 is zero), the first part of the microinstruction, namely the control word, is stored in the control word latch. 5 of the 8 signals of this control word are used to control the data flow through the processor by
    selecting the source and destination device. The final data transfer occurs in the following "odd" clock cycle when A0 is one. Since in this second clock cycle the EPROM itself can also serve as a data source, it is easy to store constant values defined
    by the microcode in the various registers and the RAM. However, since any address can be input into the EPROM in this cycle, it is possible to perform random read accesses to the EPROM so that the application program (the Forth interpreter) can be
    executed from the EPROM.

    As you can see, the main purpose of all the logic is to transfer data from the various sources to the various destinations under the control of the microcode. The CPU registers such as PC, SP, Accu, etc. are all stored in RAM. The programme counter is
    incremented via a look-up table in the EPROM.

    Data manipulation is done via a single NOR gate on the D0 data line. You may already know that really any logical function can be derived from the NOR function, even complex functions like addition and subtraction. But to process all the bits of a byte,
    My4TH must loop over all the data bits and process bit by bit. The required data shift function is also implemented as a look-up table in the EPROM.

    Conditional jumps are only possible within the 128 microcode positions of an OP code. When the microcode needs to perform a conditional jump, it first loads the target address (which ranges from 0 to 127) into the lower 8 bits of the 16-bit address latch.
    A control signal coming from the control word latch then enables the conditional loading of the new address into the microinstruction counter depending on the value of D0 within the odd clock cycle.

    If you are more interested in the microcode, I recommend to study the document "The MyNOR ADD instruction" where I describe how I implemented the ADD instruction in the microcode for the MyNOR computer. Since MyNOR and My4TH are very similar, the
    microcode of the ADD function works exactly the same on My4TH. But to increase performance, I cheated a little on the My4TH by implementing the one-bit adder via a small look-up table in the EPROM.

    Now we get down to business: The schematic. Click on the image to download it as a better readable PDF file.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jach Feng@21:1/5 to All on Sat Apr 1 01:26:35 2023
    Jurgen Pitaske 在 2023年4月1日 星期六下午3:33:42 [UTC+8] 的信中寫道：
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm
    Having a Forth ( his own version ) running WITHOUT a processor
    - must have been a nice journey .

    And now available as kit soon, so you can solder it together yourself.

    But one question remains: How does it all work?

    It all starts with the microcode address counter, which is something like the "heart" of the computer. Each machine instruction is composed of up to 128 microinstructions, whereby a microinstruction consists of two parts: an 8-bit control word and an
    optional 8-bit data word. The machine instruction (the "OP code") to be executed is applied to address lines A8 to A14 of the EPROM, and the microcode address counter is connected to A0 to A7. The microcode address counter counts through all
    microinstructions of the current OP code.

    In every "even" clock cycle (when A0 is zero), the first part of the microinstruction, namely the control word, is stored in the control word latch. 5 of the 8 signals of this control word are used to control the data flow through the processor by
    selecting the source and destination device. The final data transfer occurs in the following "odd" clock cycle when A0 is one. Since in this second clock cycle the EPROM itself can also serve as a data source, it is easy to store constant values defined
    by the microcode in the various registers and the RAM. However, since any address can be input into the EPROM in this cycle, it is possible to perform random read accesses to the EPROM so that the application program (the Forth interpreter) can be
    executed from the EPROM.

    As you can see, the main purpose of all the logic is to transfer data from the various sources to the various destinations under the control of the microcode. The CPU registers such as PC, SP, Accu, etc. are all stored in RAM. The programme counter is
    incremented via a look-up table in the EPROM.

    Data manipulation is done via a single NOR gate on the D0 data line. You may already know that really any logical function can be derived from the NOR function, even complex functions like addition and subtraction. But to process all the bits of a byte,
    My4TH must loop over all the data bits and process bit by bit. The required data shift function is also implemented as a look-up table in the EPROM.

    Conditional jumps are only possible within the 128 microcode positions of an OP code. When the microcode needs to perform a conditional jump, it first loads the target address (which ranges from 0 to 127) into the lower 8 bits of the 16-bit address
    latch. A control signal coming from the control word latch then enables the conditional loading of the new address into the microinstruction counter depending on the value of D0 within the odd clock cycle.

    If you are more interested in the microcode, I recommend to study the document "The MyNOR ADD instruction" where I describe how I implemented the ADD instruction in the microcode for the MyNOR computer. Since MyNOR and My4TH are very similar, the
    microcode of the ADD function works exactly the same on My4TH. But to increase performance, I cheated a little on the My4TH by implementing the one-bit adder via a small look-up table in the EPROM.

    Now we get down to business: The schematic. Click on the image to download it as a better readable PDF file.
    Why you always copy things from others?

    --Jach

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to Jach Feng on Sat Apr 1 02:35:22 2023
    On Saturday, 1 April 2023 at 09:26:37 UTC+1, Jach Feng wrote:
    Jurgen Pitaske 在 2023年4月1日 星期六下午3:33:42 [UTC+8] 的信中寫道：
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm
    Having a Forth ( his own version ) running WITHOUT a processor
    - must have been a nice journey .

    And now available as kit soon, so you can solder it together yourself.

    But one question remains: How does it all work?

    It all starts with the microcode address counter, which is something like the "heart" of the computer. Each machine instruction is composed of up to 128 microinstructions, whereby a microinstruction consists of two parts: an 8-bit control word and an
    optional 8-bit data word. The machine instruction (the "OP code") to be executed is applied to address lines A8 to A14 of the EPROM, and the microcode address counter is connected to A0 to A7. The microcode address counter counts through all
    microinstructions of the current OP code.

    In every "even" clock cycle (when A0 is zero), the first part of the microinstruction, namely the control word, is stored in the control word latch. 5 of the 8 signals of this control word are used to control the data flow through the processor by
    selecting the source and destination device. The final data transfer occurs in the following "odd" clock cycle when A0 is one. Since in this second clock cycle the EPROM itself can also serve as a data source, it is easy to store constant values defined
    by the microcode in the various registers and the RAM. However, since any address can be input into the EPROM in this cycle, it is possible to perform random read accesses to the EPROM so that the application program (the Forth interpreter) can be
    executed from the EPROM.

    As you can see, the main purpose of all the logic is to transfer data from the various sources to the various destinations under the control of the microcode. The CPU registers such as PC, SP, Accu, etc. are all stored in RAM. The programme counter
    is incremented via a look-up table in the EPROM.

    Data manipulation is done via a single NOR gate on the D0 data line. You may already know that really any logical function can be derived from the NOR function, even complex functions like addition and subtraction. But to process all the bits of a
    byte, My4TH must loop over all the data bits and process bit by bit. The required data shift function is also implemented as a look-up table in the EPROM.

    Conditional jumps are only possible within the 128 microcode positions of an OP code. When the microcode needs to perform a conditional jump, it first loads the target address (which ranges from 0 to 127) into the lower 8 bits of the 16-bit address
    latch. A control signal coming from the control word latch then enables the conditional loading of the new address into the microinstruction counter depending on the value of D0 within the odd clock cycle.

    If you are more interested in the microcode, I recommend to study the document "The MyNOR ADD instruction" where I describe how I implemented the ADD instruction in the microcode for the MyNOR computer. Since MyNOR and My4TH are very similar, the
    microcode of the ADD function works exactly the same on My4TH. But to increase performance, I cheated a little on the My4TH by implementing the one-bit adder via a small look-up table in the EPROM.

    Now we get down to business: The schematic. Click on the image to download it as a better readable PDF file.
    Why you always copy things from others?

    --Jach

    It all started with a link - so basically copied from others ????
    I did like it as I saw it in other groups already

    What I copy here is for others as quick access.
    And it is a lot more interesting than some of the comments here - including yours.

    Looking at the comment from DXFORTH for example - this is related to Shakespeare.
    It seems this is what you prefer as you did not comment.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to Jach Feng on Sat Apr 1 02:41:03 2023
    On Saturday, 1 April 2023 at 09:26:37 UTC+1, Jach Feng wrote:

    Why you always copy things from others?

    --Jach

    You are right.
    Should I like your comments like you posted elsewhere here:

    wonder you must a sexual deviation lib. Why you hate Trump so much? Just because he has an opposite view on behavior you have?

    --Jach

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From none) (albert@21:1/5 to jpitaske@gmail.com on Sat Apr 1 12:18:52 2023
    In article <b51380c9-b6f8-43b3-9d2f-79b627ddeac6n@googlegroups.com>,
    Jurgen Pitaske <jpitaske@gmail.com> wrote:
    On Saturday, 1 April 2023 at 09:26:37 UTC+1, Jach Feng wrote:

    Why you always copy things from others?

    --Jach

    You are right.
    Should I like your comments like you posted elsewhere here:

    wonder you must a sexual deviation lib. Why you hate Trump so much? Just
    because he has an opposite view on behavior you have?

    After all this time I don't know what this thread is all about.
    "My4th" is not a good title for a post.


    --Jach
    --
    Don't praise the day before the evening. One swallow doesn't make spring.
    You must not say "hey" before you have crossed the bridge. Don't sell the
    hide of the bear until you shot it. Better one bird in the hand than ten in
    the air. First gain is a cat spinning. - the Wise from Antrim -

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jim Bailey@21:1/5 to none albert on Tue Apr 11 11:14:30 2023
    On Saturday, April 1, 2023 at 3:18:55 AM UTC-7, none albert wrote:
    In article <b51380c9-b6f8-43b3...@googlegroups.com>,
    Jurgen Pitaske <jpit...@gmail.com> wrote:
    On Saturday, 1 April 2023 at 09:26:37 UTC+1, Jach Feng wrote:

    Why you always copy things from others?

    --Jach

    You are right.
    Should I like your comments like you posted elsewhere here:

    wonder you must a sexual deviation lib. Why you hate Trump so much? Just
    because he has an opposite view on behavior you have?
    After all this time I don't know what this thread is all about.
    "My4th" is not a good title for a post.


    --Jach
    --
    Don't praise the day before the evening. One swallow doesn't make spring. You must not say "hey" before you have crossed the bridge. Don't sell the hide of the bear until you shot it. Better one bird in the hand than ten in the air. First gain is a cat spinning. - the Wise from Antrim -

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jim Bailey@21:1/5 to Jurgen Pitaske on Tue Apr 11 11:21:54 2023
    On Saturday, April 1, 2023 at 12:35:37 AM UTC-7, Jurgen Pitaske wrote:
    On Saturday, 1 April 2023 at 08:33:42 UTC+1, Jurgen Pitaske wrote:
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm
    Having a Forth ( his own version ) running WITHOUT a processor
    - must have been a nice journey .

    And now available as kit soon, so you can solder it together yourself.

    But one question remains: How does it all work?

    It all starts with the microcode address counter, which is something like the "heart" of the computer. Each machine instruction is composed of up to 128 microinstructions, whereby a microinstruction consists of two parts: an 8-bit control word and an
    optional 8-bit data word. The machine instruction (the "OP code") to be executed is applied to address lines A8 to A14 of the EPROM, and the microcode address counter is connected to A0 to A7. The microcode address counter counts through all
    microinstructions of the current OP code.

    In every "even" clock cycle (when A0 is zero), the first part of the microinstruction, namely the control word, is stored in the control word latch. 5 of the 8 signals of this control word are used to control the data flow through the processor by
    selecting the source and destination device. The final data transfer occurs in the following "odd" clock cycle when A0 is one. Since in this second clock cycle the EPROM itself can also serve as a data source, it is easy to store constant values defined
    by the microcode in the various registers and the RAM. However, since any address can be input into the EPROM in this cycle, it is possible to perform random read accesses to the EPROM so that the application program (the Forth interpreter) can be
    executed from the EPROM.

    As you can see, the main purpose of all the logic is to transfer data from the various sources to the various destinations under the control of the microcode. The CPU registers such as PC, SP, Accu, etc. are all stored in RAM. The programme counter
    is incremented via a look-up table in the EPROM.

    Data manipulation is done via a single NOR gate on the D0 data line. You may already know that really any logical function can be derived from the NOR function, even complex functions like addition and subtraction. But to process all the bits of a
    byte, My4TH must loop over all the data bits and process bit by bit. The required data shift function is also implemented as a look-up table in the EPROM.

    Conditional jumps are only possible within the 128 microcode positions of an OP code. When the microcode needs to perform a conditional jump, it first loads the target address (which ranges from 0 to 127) into the lower 8 bits of the 16-bit address
    latch. A control signal coming from the control word latch then enables the conditional loading of the new address into the microinstruction counter depending on the value of D0 within the odd clock cycle.

    If you are more interested in the microcode, I recommend to study the document "The MyNOR ADD instruction" where I describe how I implemented the ADD instruction in the microcode for the MyNOR computer. Since MyNOR and My4TH are very similar, the
    microcode of the ADD function works exactly the same on My4TH. But to increase performance, I cheated a little on the My4TH by implementing the one-bit adder via a small look-up table in the EPROM.

    Now we get down to business: The schematic. Click on the image to download it as a better readable PDF file.
    Want to build your own? Everything you need is here:

    Downloads
    KiCad design files: kicad_my4th-sbc_v1.2.zip
    Gerber data for PCB order: gerber_my4th-sbc_v1.2.zip
    Schematics as PDF file: schematics_my4th-sbc_v1.2.pdf
    My4TH construction manual: My4TH_Construction_Manual.pdf
    Description of the GPIO interface: My4TH-Interfaces.pdf
    My4TH Assembly Instruction Set: My4TH_Instruction-Set.pdf
    My4TH EPROM image files and source code: my4th-rom-v1.0.zip
    Forth word set extension modules: my4th-modules.zip
    Forth glossary and reference: My4TH_Forth_Glossary.pdf
    Data exchange between My4TH and a PC: My4TH_Data_Exchange.pdf
    my4th transfer tool for Windows and Linux: my4th-tool-v1.0.zip
    myca cross assembler for MyCPU, MyNOR and My4TH: myca-1.10.zip

    Using the assets posted on the MyNOR.ORG site, I was able to get a working computer. Its really a interesting machine, now I need to learn forth :-)

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jim Bailey@21:1/5 to none albert on Tue Apr 11 11:17:47 2023
    On Saturday, April 1, 2023 at 3:18:55 AM UTC-7, none albert wrote:
    In article <b51380c9-b6f8-43b3...@googlegroups.com>,
    Jurgen Pitaske <jpit...@gmail.com> wrote:
    On Saturday, 1 April 2023 at 09:26:37 UTC+1, Jach Feng wrote:

    Why you always copy things from others?

    --Jach

    You are right.
    Should I like your comments like you posted elsewhere here:

    wonder you must a sexual deviation lib. Why you hate Trump so much? Just
    because he has an opposite view on behavior you have?
    After all this time I don't know what this thread is all about.
    "My4th" is not a good title for a post.


    --Jach
    --
    Don't praise the day before the evening. One swallow doesn't make spring. You must not say "hey" before you have crossed the bridge. Don't sell the hide of the bear until you shot it. Better one bird in the hand than ten in the air. First gain is a cat spinning. - the Wise from Antrim -

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to minforth on Thu Apr 13 06:48:57 2023
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm


    As I have just seen today, the kit is available

    so you can build this Forth System based on a 1 Bit NOR ALU.
    Slow but works

    http://mynor.org/my4th.htm?fbclid=IwAR3HNqu7KIx6O-ZdwXqjWR41bVZ_CyvNyrjM5cQL2ngCtQZfjwkqcj_croo

    and where to buy the kit https://www.budgetronics.eu/en/building-kits/my4th-single-board-forth-computer-buidling-kit/a-25998-20

    50 Euros from Amsterdam.

    I wonder who will be the first one to post a successful OK

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)
  • From Jurgen Pitaske@21:1/5 to Jurgen Pitaske on Thu Apr 13 07:54:41 2023
    On Thursday, 13 April 2023 at 14:48:59 UTC+1, Jurgen Pitaske wrote:
    On Friday, 31 March 2023 at 22:03:36 UTC+1, minforth wrote:
    Just want to share this. It is impressive.
    http://mynor.org/my4th.htm
    As I have just seen today, the kit is available

    so you can build this Forth System based on a 1 Bit NOR ALU.
    Slow but works

    http://mynor.org/my4th.htm?fbclid=IwAR3HNqu7KIx6O-ZdwXqjWR41bVZ_CyvNyrjM5cQL2ngCtQZfjwkqcj_croo

    and where to buy the kit https://www.budgetronics.eu/en/building-kits/my4th-single-board-forth-computer-buidling-kit/a-25998-20

    50 Euros from Amsterdam.

    I wonder who will be the first one to post a successful OK

    I wondered if the EPROM is pre-programmed, and just got confirmation that it is. Great.

    --- SoupGate-Win32 v1.05
    * Origin: fsxNet Usenet Gateway (21:1/5)