To offer some content in a hopefully not dead group:

I have written a 6502 simulator for CP/M (and DOS and Unix). With
limited (simulated) RAM, of course, and only about 3000 instructions
per second on a 4MHz Z80, but maybe it is still useful to someone.

Here it is: http://localhost/t3x.org/t3x/0/sim65kit.html

--
Nils M Holm < n m h @ t 3 x . o r g > http://t3x.org

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

Cool!
Obviously the correct link is: https://t3x.org/t3x/0/sim65kit.html
Congrats for this 25+ years work.
iss

On 3/10/24 17:09, Nils M Holm wrote:

To offer some content in a hopefully not dead group:

I have written a 6502 simulator for CP/M (and DOS and Unix). With
limited (simulated) RAM, of course, and only about 3000 instructions
per second on a 4MHz Z80, but maybe it is still useful to someone.

Here it is: http://localhost/t3x.org/t3x/0/sim65kit.html

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

me <me@net.net> wrote:

Cool!
Obviously the correct link is: https://t3x.org/t3x/0/sim65kit.html
Congrats for this 25+ years work.
iss

Thanks! And, yeah, this is the correct link. Oops!

Did not work on it all the time, though, just picked it up again
and again. Most recently when I got a KIM Uno:

http://t3x.org/kimuno/case.html

On 3/10/24 17:09, Nils M Holm wrote:

To offer some content in a hopefully not dead group:

I have written a 6502 simulator for CP/M (and DOS and Unix). With
limited (simulated) RAM, of course, and only about 3000 instructions
per second on a 4MHz Z80, but maybe it is still useful to someone.

Here it is: http://localhost/t3x.org/t3x/0/sim65kit.html

--
Nils M Holm < n m h @ t 3 x . o r g > http://t3x.org

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

Nils

Not a dead grou!

Speed is interesting... Without looking at your code, I'll propose a
design. There is (almost) 1:1 correspondence in instructions.

Consider not emulating, but translating. I'm thinking on this -- and my
"first cut" has 1 6502 to 3 8080. As there are only 1 byte opcodes in
6502, max 256 entry dispatch table - so, ldax d, inx d, lxi h,t, mov c,a,
mvi b,0 dad b, dad d, mov a,m, inx h, mov h,m, mov l,a, pchl, 3
instructions, jmp dispatch. a bit more overhead, so 20 instructions per.
At 4Mhz, we expect around 20,000 6502 instructions per second.

If we remove the dipatch loop (for sequences of code with no branch we
could achieve 4 times that. Yes, dispatch dominates. But, unfortunately we
do not have the memory to keep track of instructions counts. If I were
doing this in an emulator this would be easy. Doing it ON the hardware
will be tricky. Flags only need proper calculation on certain events --
looking at them and branching. We can go "back in time" to the previous instruction if needed. Slows us down a bit (we will need to store the
last instruction location).

I think I am going to play with this a while -- before looking at you
code. On the backburner.

And I am sorry -- interesting idea. Rambling a bit.

-Fred
On 10 Mar 2024 15:09:39 GMT, Nils M Holm wrote:

To offer some content in a hopefully not dead group:

I have written a 6502 simulator for CP/M (and DOS and Unix). With
limited (simulated) RAM, of course, and only about 3000 instructions per second on a 4MHz Z80, but maybe it is still useful to someone.

Here it is: http://localhost/t3x.org/t3x/0/sim65kit.html

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)

Fred Weigel <fred_weigel@hotmail.com> wrote:

Speed is interesting... Without looking at your code, I'll propose a
design. There is (almost) 1:1 correspondence in instructions.

This is very interesting, but the approach is completely different from
mine. The code in SIM65KIT tries to be easy to understand rather than
clever, let alone optimal. Over the years the programs I am writing
have become more and more simple and obvious. Why would I make things
more difficult than they need to be?

Consider not emulating, but translating. I'm thinking on this -- and my "first cut" has 1 6502 to 3 8080. As there are only 1 byte opcodes in
6502, max 256 entry dispatch table - so, ldax d, inx d, lxi h,t, mov c,a,
mvi b,0 dad b, dad d, mov a,m, inx h, mov h,m, mov l,a, pchl, 3
instructions, jmp dispatch. a bit more overhead, so 20 instructions per.
At 4Mhz, we expect around 20,000 6502 instructions per second.

If we remove the dipatch loop (for sequences of code with no branch we
could achieve 4 times that. Yes, dispatch dominates. But, unfortunately we
do not have the memory to keep track of instructions counts. If I were
doing this in an emulator this would be easy. Doing it ON the hardware
will be tricky. Flags only need proper calculation on certain events -- looking at them and branching. We can go "back in time" to the previous instruction if needed. Slows us down a bit (we will need to store the
last instruction location).

I think I am going to play with this a while -- before looking at you
code. On the backburner.

And I am sorry -- interesting idea. Rambling a bit.

-Fred
On 10 Mar 2024 15:09:39 GMT, Nils M Holm wrote:

To offer some content in a hopefully not dead group:

I have written a 6502 simulator for CP/M (and DOS and Unix). With
limited (simulated) RAM, of course, and only about 3000 instructions per
second on a 4MHz Z80, but maybe it is still useful to someone.

Here it is: http://localhost/t3x.org/t3x/0/sim65kit.html

--
Nils M Holm < n m h @ t 3 x . o r g > http://t3x.org

--- SoupGate-Win32 v1.05
* Origin: fsxNet Usenet Gateway (21:1/5)