• Re: Simulating termination analyzers by dummies --- addressed

    From joes@21:1/5 to All on Wed Jun 19 18:03:59 2024
    Am Wed, 19 Jun 2024 12:52:59 -0500 schrieb olcott:
    On 6/19/2024 12:51 PM, joes wrote:
    Am Wed, 19 Jun 2024 09:05:29 -0500 schrieb olcott:
    On 6/19/2024 4:29 AM, Alan Mackenzie wrote:
    olcott <polcott333@gmail.com> wrote:
    On 6/18/2024 4:36 PM, Alan Mackenzie wrote:
    In comp.theory olcott <polcott333@gmail.com> wrote:
    On 6/18/2024 12:57 PM, joes wrote:
    Am Tue, 18 Jun 2024 12:25:44 -0500 schrieb olcott:
    On 6/18/2024 12:06 PM, joes wrote:

    When the adapted UTM halts after recognizing the repeating state of a
    Turing Machine Description that only loops and transitions to its
    reject state then this adapted UTM is a halt decider for inputs that
    only loop.
    But not a simulator.
    ^

    A UTM can be adapted so that it only simulates a fixed number of >>>>>>>>> iterations of an input that loops.
    As has often been said, it is then no longer a universal turing
    machine.
    So what?
    You wanted to simulate the input.
    ^

    It is a mistake for a simulating termination analyzer to simulate
    infinite repeating states.
    How can that be a "mistake" if it's what the thing is programmed to
    do?
    Termination analyzers are required to halt so it fails to meet its
    spec.
    What use is an analyser that can't deal with possible loops?
    ^

    void DDD()
    {
    H0(DDD);
    }
    H0 should just return that DDD halts, which it does.

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