• Bug#1094881: mtxrun: illegal instruction x86_64 (rorx usage, in libmima

    From Arthur Marsh@21:1/5 to All on Sun Feb 9 16:20:01 2025
    Package: libmimalloc3
    Version: 3.0.1+ds-2+b1
    Followup-For: Bug #1094881

    Dear Maintainer,

    *** Reporter, please consider answering these questions, where appropriate ***

    * What led up to the situation?

    Just a pointer, I had this problem on the following CPU with binutils 2.44-1:

    vendor_id : AuthenticAMD
    cpu family : 21
    model : 19
    model name : AMD A10-6800K APU with Radeon(tm) HD Graphics
    stepping : 1
    microcode : 0x6001119
    cpu MHz : 3913.051
    cache size : 2048 KB
    physical id : 1
    siblings : 4
    core id : 0
    cpu cores : 4
    apicid : 16
    initial apicid : 16
    fpu : yes
    fpu_exception : yes
    cpuid level : 13
    wp : yes
    flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
    pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp
    lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclm
    ulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 popcnt aes xsave avx f16c lahf_lm cmp
    _legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop
    skinit wdt lwp fma4 tce nodeid_msr tbm topoext perfctr_core perfctr_nb cpb hw_ps
    tate ssbd vmmcall bmi1 arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flu
    shbyasid decodeassists pausefilter pfthreshold
    bugs : fxsave_leak sysret_ss_attrs null_seg spectre_v1 spectre_v2 spe
    c_store_bypass retbleed
    bogomips : 8185.23
    TLB size : 1536 4K pages
    clflush size : 64
    cache_alignment : 64
    address sizes : 48 bits physical, 48 bits virtual
    power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro~

    but NOT on the following processor with binutils 2.44-1:

    vendor_id : AuthenticAMD
    cpu family : 25
    model : 80
    model name : AMD Ryzen 5 5500GT with Radeon Graphics
    stepping : 0
    microcode : 0xa500011
    cpu MHz : 3567.200
    cache size : 512 KB
    physical id : 0
    siblings : 12
    core id : 0
    cpu cores : 6
    apicid : 0
    initial apicid : 0
    fpu : yes
    fpu_exception : yes
    cpuid level : 16
    wp : yes
    flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf rapl pni
    pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb
    cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr
    rdpru wbnoinvd cppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm debug_swap
    bugs : sysret_ss_attrs spectre_v1 spectre_v2 spec_store_bypass srso ibpb_no_ret
    bogomips : 7186.49
    TLB size : 2560 4K pages
    clflush size : 64
    cache_alignment : 64
    address sizes : 48 bits physical, 48 bits virtual
    power management: ts ttp tm hwpstate cpb eff_freq_ro [13] [14]~

    The AMD A10-6800K APU with Radeon(tm) HD Graphics supports up to:

    x86-64-v2-support

    and the

    AMD Ryzen 5 5500GT with Radeon Graphics supports up to:

    x86-64-v3-support

    * What exactly did you do (or not do) that was effective (or
    ineffective)?
    * What was the outcome of this action?
    * What outcome did you expect instead?

    *** End of the template - remove these template lines ***


    -- System Information:
    Distributor ID: Devuan
    Description: Devuan GNU/Linux 6 (excalibur/ceres)
    Release: 6
    Codename: excalibur ceres
    Architecture: x86_64

    Kernel: Linux 6.14.0-rc1+ (SMP w/12 CPU threads; PREEMPT)
    Kernel taint flags: TAINT_WARN
    Locale: LANG=C, LC_CTYPE=C.UTF-8 (charmap=UTF-8), LANGUAGE not set
    Shell: /bin/sh linked to /usr/bin/dash
    Init: sysvinit (via /sbin/init)

    Versions of packages libmimalloc3 depends on:
    ii libc6 2.41-1

    libmimalloc3 recommends no packages.

    libmimalloc3 suggests no packages.

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