This is too late for trixie, but it'd be nice to have it at least
in experimental.

This patch improves the emmc I/O performance on Starfive Visionfive2 (1.3b)
and Pine64 Star64. I only changed the dts of these two boards because I only have these boards. If anyone else is willing to test, then we could submit
this patch to upstream, and/or apply it to all JH7110-based boards. The
more testers the merrier.

Inspired by [2].
Link [2]: https://patchwork.kernel.org/project/linux-riscv/patch/20250222-fml13v01_emmc_speed-v2-1-3ffc5b1f5663@hotmail.com/
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We increase the clock speed to increase the I/O performance of mmc.
As defined in jh7110-common.dtsi, mmc0 has the assigned-clock-rates
set to 50MHz, but that's very low comparing to the max-frequency 200MHz. Sequential I/O performance is not very good (45MB/s), but it's still
better than micro SD card (19MB/s).

Starfive stated [1] that the SD card gpio shares the 3.3V rail
with 40-pin generic gpio, so the SD card cannot switch to 1.8V
to run at SDR104 (208MHz). But the emmc uses 1.8V rail
and is capable of running at HS200.

After some tests, at 150MHz or 120MHz with
"dd if=/dev/mmcblk0p1 of=/dev/null bs=4M iflag=nocache", attempts of downshift are triggererd (shown in dmesg). 100MHz seems to be stable, sequencial
I/O speed improved from 45MB/s to 73MB/s.

Link: [1] https://github.com/starfive-tech/linux/commit/aff31d9e8c0db25713222cb806ea771df7f0d900
# Signed-off-by: $DEBNAME <$DEBEMAIL>
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arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts | 4 ++++
arch/riscv/b